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I am a PhD candidate in the Department of Computer Science and Engineering (CSE) at the University of California, San Diego (UCSD). I received my M.S. and B.Sc degrees from the School of Electrical and Computer Engineering (ECE) at the University of Tehran (UT), Tehran in 2014 and 2011 respectively.
I am a member of System Energy Efficiency Lab (SeeLab) working with Professor Tajana Rosing. My research interests are brain-inspired computing, computer architecture, and machine learning. Based on the research that I have started, we opened a new sub-group in SeeLab (Emerging Computing), where I am closely mentoring more than 20 graduate and undergraduate students, including four PhD students (more info here). I have gotten several awards during my study including UCSD Jacobs School Powell Fellowship (2014-2017), best paper candidate at ISQED 2018 and ICCD 2016 conferences, and UC San Diego 2018 doctoral award for excellence in research. You can find my CV here.
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Research Projects
Brain-Inspired Hyperdimensional Computing:
Although current computers are significantly powerful performing arithmetic operations, they show very low efficiency when processing the cognitive tasks. In contract, human brain's are surprisingly efficient and fast in processing the cognitive tasks, even though they are feeble in calculating with numbers. This fact motivates us to design new algorithms which can have similar functionality as brain. The mathematical properties of high-dimensional spaces show remarkable agreement with behaviors controlled by the brain. Brain-inspired hyperdimensional (HD) computing explores the emulation of cognition by computing with hypervectors as an alternative to computing with numbers. HD computing provides an opportunity for robust, general and scalable model of computing using hypervectors in thousand dimensions.
Although current computers are significantly powerful performing arithmetic operations, they show very low efficiency when processing the cognitive tasks. In contract, human brain's are surprisingly efficient and fast in processing the cognitive tasks, even though they are feeble in calculating with numbers. This fact motivates us to design new algorithms which can have similar functionality as brain. The mathematical properties of high-dimensional spaces show remarkable agreement with behaviors controlled by the brain. Brain-inspired hyperdimensional (HD) computing explores the emulation of cognition by computing with hypervectors as an alternative to computing with numbers. HD computing provides an opportunity for robust, general and scalable model of computing using hypervectors in thousand dimensions.
Approximate Computing:
We propose a novel architecture with software and hardware support for approximate computing. Hardware components are enhanced with ability to dynamically adapt approximation at a quantifiable and controllable cost in terms of accuracy. Software services complement hardware to ensure user’s perception is not compromised, while maximizing the energy savings due to approximations. The changes to hardware design include approximation enabled CPU, GPU, accelerators (DSPs) and storage.
We propose a novel architecture with software and hardware support for approximate computing. Hardware components are enhanced with ability to dynamically adapt approximation at a quantifiable and controllable cost in terms of accuracy. Software services complement hardware to ensure user’s perception is not compromised, while maximizing the energy savings due to approximations. The changes to hardware design include approximation enabled CPU, GPU, accelerators (DSPs) and storage.
In-Memory Accelerators:
Many machine learning and cognitive applications process large data set collected in the Internet of Things domain. Running the data-intensive workloads on traditional cores results in high energy consumption and slow processing speed. This inefficiency stems from the large amount of data movements between memory and processing units in the traditional architectures. In addition, many cognitive systems, e.g., big data analysis and healthcare applications, assimilate the data using deep neural networks and classification algorithms which are also computationally expensive in the traditional Von Neumann architecture. We design novel memory architectures which completely replaces the traditional processing units and performs brain-inspired computations such as deep neural networks and hyperdimensional computing.
Many machine learning and cognitive applications process large data set collected in the Internet of Things domain. Running the data-intensive workloads on traditional cores results in high energy consumption and slow processing speed. This inefficiency stems from the large amount of data movements between memory and processing units in the traditional architectures. In addition, many cognitive systems, e.g., big data analysis and healthcare applications, assimilate the data using deep neural networks and classification algorithms which are also computationally expensive in the traditional Von Neumann architecture. We design novel memory architectures which completely replaces the traditional processing units and performs brain-inspired computations such as deep neural networks and hyperdimensional computing.
Emerging Memory/Logic Design:
Designing a memory subsystem is challenging because it involves balancing among multiple goals. The goals include fast access time, programmability, high bandwidth, low power, low cost, reliability, and security. Some of these goals may contradict one another, thus it is important to strike a good balance given the target market of a system. We exploit the feature of emerging technologies, e.g. emerging transistors and non-volatile memories, to design an ultra-efficient and stable memories for embedded applications in circuit, architecture and application levels.
Designing a memory subsystem is challenging because it involves balancing among multiple goals. The goals include fast access time, programmability, high bandwidth, low power, low cost, reliability, and security. Some of these goals may contradict one another, thus it is important to strike a good balance given the target market of a system. We exploit the feature of emerging technologies, e.g. emerging transistors and non-volatile memories, to design an ultra-efficient and stable memories for embedded applications in circuit, architecture and application levels.
Mentorship:
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I am closely mentoring about 20 graduate and undergrad students including four PhD students. I always consider diversity and minority seriously during my mentorship. I was honored to mentor about 14 female students toward their graduate and undergraduate research. Based on their research, we have published more than 7 papers in the top venue conferences/journals. I have also volunteered to participated in ESRP (2018) and ENLACE (2017, 2018) programs which aim to support undergraduate and Latino research at UC San Diego. More info can be found here.
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What's New?
New! June 2018. Doctoral Award for Excellence in Research (link)! New! May 2018. Two Accepted papers in ISLPED'18! New! April 2018. Best poster award ResearchExpo'18! Presenter Daniel Peroni. April 2018. Presentation at NVMW'18, ISQED'18 and BHI'18 conferences! March 2018. Best paper candidate ISQED'18! Thanks Daniel for great presentation! Feb 2018. Program committee member in 31st IEEE SOCC'18! Feb 2018. Accepted paper about hierarchical classification in DAC'18! Feb 2018. Accepted NVQuery paper (the first memory-based query processor) TCAD! Jan 2018. Program committee member in 14th IEEE PRIM'18! Jan 2018. Invitation talk from CSES at CSE day, UCSD! Dec 2017. Accepted paper in Biomedical and Health Informatics conference (BHI'18)! Dec 2017. Accepted papers in ISQED conference! Nov 2017. Accepted paper in DATE conference! Nov 2017.Paper presentation at VMC'17 workshop, Irvine! Nov 2017.Paper presentation at ICCAD'17, Irvine! Nov 2017. Two paper presentations at ICRC'17, Washington DC! Oct 2017. Presentation at Center For Networked Systems (CNS'17)!, La Jolla! Sep 2017. IEEE invitation talk at San Diego State University, CA. Sep 2017. Accepted papers in َASP-DAC'18! Sep 2017. Paper presentation at Techcon'17, Austin. Sep 2017. Finish teaching two undergraduate courses at UC San Diego, check here! Aug 2017. Accepted papers in Embedded System Letter (ESL'17)! Aug 2017. Two accepted papers in ICRC'17! June 2017. Accepted paper in VLSI-SOC'17! June 2017. Accepted paper in ICCAD'17! June 2017. Paper presentation at DAC'17! June 2017. Accepted paper in D&T. Thanks Dr. Abbas Rahimi and prof. J. M. Rabaery! June 2017. My mentee Max Masich defensed his master thesis! June 2017. My mentee Deqian Kong selected as best undergrad researcher at CSE [Picture]! May 2017. Accepted papers in Techcon conference! May 2017. Member of program committee in IEEE SOC'17 and IEEE PRIM'17! May 2017. accepted paper in ISLPED! March 2017. ISQED paper presentation, Santa Clara! March 2017. NVMW paper presentation, La Jolla! Feb 2017. Two accepted papers in DAC 2017! Jan 2017. Accepted paper in EEE Transactions on Multi-Scale Computing Systems. Dec 2016. Accepted CAP Processor paper in ISQED 2017. Nov 2016. Accepted CPU approximation papers in IEEE TETC. Nov 2016. Accepted papers in DATE 2017! Thanks prof. F. Koushanfar group at ECE. Oct 2016. Accepted paper in HPCA 2017! Thanks our collaborator at UC Berkeley (Dr. Abbas Rahimi and prof. J. M. Rabaery) Sept 2016. Accepted paper in ASPDAC 2017! Aug 2016. ICCD'16 paper selected as top ranked paper for publishing in IEEE TETC! Aug 2016. Accepted paper in ICCD 2016! June 2016. DAC paper presentation, Austin! June 2016. Being nominated for the Outstanding Graduate Student Award at UCSD! June 2016. Accepted paper in NVMSA 2016! June 2016. Accepted paper in Techcon conference 2016! May 2016. GLSVLSI paper presentation, Boston! May 2016. Accepted paper in MEMSYS Conference! Washington DC May 2016. Defensed my proposal!! (PhD Candidate) May 2016. Accepted paper in ISLPED for long presentation, San Francisco! April 2016. Accepted paper in IEEE Transaction on Emerging Topics Computing! April 2016. Research Expo'16 poster presentation. March 2016. ISQED paper presentation, Santa Clara! February 2016. Accepted GLSVLSI 2016 papers! January 2016. "From non-volatile memory to approximate computing" talk at UCSD seminar class [Slide]. December 2015. Accepted ISQED 2016 papers! November 2015. Accepted DATE 2016 papers! November 2015. ICCAD paper presentation [Slide], Austin! July 2015. Nanoarch conference paper presentation, Boston! June 2015. Accepted ICCAD 2015 paper!! June 2015. DAC conference paper presentation, San Francisco! May 2015. Research exam passed! April 2015. Research Expo'15 poster presentation. March 2015. NVMW poster presentation! |
Collaborators and Sponsors:
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